TSINIT=Val_0x0, TSIPV6ENA=Val_0x0, TSMSTRENA=Val_0x0, TSUPDT=Val_0x0, TSIPENA=Val_0x0, TSCTRLSSR=Val_0x0, AV8021ASMEN=Val_0x0, TSENALL=Val_0x0, TXTSSTSM=Val_0x0, TSENMACADDR=Val_0x0, TSEVNTENA=Val_0x0, TSTRIG=Val_0x0, TSIPV4ENA=Val_0x0, TSVER2ENA=Val_0x0, TSCFUPDT=Val_0x0, TSADDREG=Val_0x0, TSENA=Val_0x0
Timestamp Control Register
| TSENA | Enable Timestamp When this bit is set, the timestamp is added for Transmit and Receive packets. When disabled, timestamp is not added for transmit and receive packets and the Timestamp Generator is also suspended. The user needs to initialize the Timestamp (system time) after enabling this mode. On the Receive side, the MAC processes the 1588 packets only if this bit is set. 0 (Val_0x0): Timestamp is disabled 1 (Val_0x1): Timestamp is enabled |
| TSCFUPDT | Fine or Coarse Timestamp Update When this bit is set, the Fine method is used to update system timestamp. When this bit is reset, Coarse method is used to update the system timestamp. 0 (Val_0x0): Coarse method is used to update system timestamp 1 (Val_0x1): Fine method is used to update system timestamp |
| TSINIT | Initialize Timestamp When this bit is set, the system time is initialized (overwritten) with the value specified in the ETH_MAC_SYSTEM_TIME_SECONDS_UPDATE and ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE registers. This bit should be zero before it is updated. This bit is reset when the initialization is complete. Only the ETH_MAC_SYSTEM_TIME_SECONDS register can be initialized. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Timestamp is not initialized 1 (Val_0x1): Timestamp is initialized |
| TSUPDT | Update Timestamp When this bit is set, the system time is updated (added or subtracted) with the value specified in ETH_MAC_SYSTEM_TIME_SECONDS_UPDATE and ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE registers. This bit should be zero before updating it. This bit is reset when the update is complete in hardware. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Timestamp is not updated 1 (Val_0x1): Timestamp is updated |
| TSTRIG | Enable Timestamp Interrupt Trigger When this bit is set, the timestamp interrupt is generated when the System Time becomes greater than the value written in the Target Time register. This bit is reset after the Timestamp Trigger Interrupt is generated. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Timestamp interrupt trigger is not enabled 1 (Val_0x1): Timestamp interrupt trigger is enabled |
| TSADDREG | Update the ETH_MAC_TIMESTAMP_ADDEND register When this bit is set, the content of the ETH_MAC_TIMESTAMP_ADDEND register is updated in the PTP block for fine correction. This bit is cleared when the update is complete. This bit should be zero before it is set. Access restriction applies. Setting 1 sets. Self-cleared. Setting 0 has no effect. 0 (Val_0x0): Addend register is not updated 1 (Val_0x1): Addend register is updated |
| TSENALL | Enable Timestamp for All Packets When this bit is set, the timestamp snapshot is enabled for all packets received by the MAC. 0 (Val_0x0): Timestamp for all packets disabled 1 (Val_0x1): Timestamp for all packets enabled |
| TSCTRLSSR | Timestamp Digital or Binary Rollover Control When this bit is set, the ETH_MAC_SYSTEM_TIME_NANOSECONDS register rolls over after 0x3B9A_C9FF value (that is, 1 nanosecond accuracy) and increments the ETH_MAC_SYSTEM_TIME_SECONDS register. When this bit is reset, the rollover value of the ETH_MAC_SYSTEM_TIME_NANOSECONDS register is 0x7FFF_FFFF. The sub-second increment must be programmed correctly depending on the CLK_PTP frequency and the value of this bit. 0 (Val_0x0): Timestamp digital or binary rollover control is disabled 1 (Val_0x1): Timestamp digital or binary rollover control is enabled |
| TSVER2ENA | Enable PTP Packet Processing for Version 2 Format When this bit is set, the IEEE 1588 version 2 format is used to process the PTP packets. When this bit is reset, the IEEE 1588 version 1 format is used to process the PTP packets. 0 (Val_0x0): PTP packet processing for version 2 format is disabled 1 (Val_0x1): PTP packet processing for version 2 format is enabled |
| TSIPENA | Enable Processing of PTP over Ethernet Packets When this bit is set, the MAC receiver processes the PTP packets encapsulated directly in the Ethernet packets. When this bit is reset, the MAC ignores the PTP over Ethernet packets. 0 (Val_0x0): Processing of PTP over Ethernet packets is disabled 1 (Val_0x1): Processing of PTP over Ethernet packets is enabled |
| TSIPV6ENA | Enable Processing of PTP Packets Sent over IPv6-UDP When this bit is set, the MAC receiver processes the PTP packets encapsulated in IPv6-UDP packets. When this bit is clear, the MAC ignores the PTP transported over IPv6-UDP packets. 0 (Val_0x0): Processing of PTP packets sent over IPv6-UDP is disabled 1 (Val_0x1): Processing of PTP packets sent over IPv6-UDP is enabled |
| TSIPV4ENA | Enable Processing of PTP Packets Sent over IPv4-UDP When this bit is set, the MAC receiver processes the PTP packets encapsulated in IPv4-UDP packets. When this bit is reset, the MAC ignores the PTP transported over IPv4-UDP packets. This bit is set by default. 0 (Val_0x0): Processing of PTP packets sent over IPv4-UDP is disabled 1 (Val_0x1): Processing of PTP packets sent over IPv4-UDP is enabled |
| TSEVNTENA | Enable Timestamp Snapshot for Event Messages When this bit is set, the timestamp snapshot is taken only for event messages (SYNC, Delay_Req, Pdelay_Req, or Pdelay_Resp). When this bit is reset, the snapshot is taken for all messages except Announce, Management, and Signaling. 0 (Val_0x0): Timestamp snapshot for event messages is disabled 1 (Val_0x1): Timestamp snapshot for event messages is enabled |
| TSMSTRENA | Enable Snapshot for Messages Relevant to Master When this bit is set, the snapshot is taken only for the messages that are relevant to the master node. Otherwise, the snapshot is taken for the messages relevant to the slave node. 0 (Val_0x0): Snapshot for messages relevant to master is disabled 1 (Val_0x1): Snapshot for messages relevant to master is enabled |
| SNAPTYPSEL | Select PTP packets for Taking Snapshots This field, along with the TSMSTRENA and TSEVNTENA bits, decide the set of PTP packet types for which snapshot needs to be taken. The encoding is as follows:
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| TSENMACADDR | Enable MAC Address for PTP Packet Filtering When this bit is set, the DA MAC address (that matches ETH_MAC_ADDRESS0_HIGH[ADDRHI] and ETH_MAC_ADDRESS0_LOW[ADDRLO]) is used to filter the PTP packets when PTP is directly sent over Ethernet. When this bit is set, received PTP packets with DA containing a special multicast or unicast address that matches the one programmed in the ETH_MAC_ADDRESS0_HIGH and ETH_MAC_ADDRESS0_LOW registers are considered for processing, when PTP is directly sent over Ethernet. 0 (Val_0x0): MAC address for PTP packet filtering is disabled 1 (Val_0x1): MAC address for PTP packet filtering is enabled |
| TXTSSTSM | Transmit Timestamp Status Mode When this bit is set, the MAC overwrites the earlier transmit timestamp status even if it is not read by the software. The MAC indicates this by setting the ETH_MAC_TX_TIMESTAMP_STATUS_NANOSECONDS[TXTSSMIS] bit. When this bit is reset, the MAC ignores the timestamp status of current packet if the timestamp status of previous packet is not read by the software. The MAC indicates this by setting the ETH_MAC_TX_TIMESTAMP_STATUS_NANOSECONDS[TXTSSMIS] bit. 0 (Val_0x0): Transmit timestamp status mode is disabled 1 (Val_0x1): Transmit timestamp status mode is enabled |
| AV8021ASMEN | AV 802.1AS Mode Enable When this bit is set, the MAC processes only untagged PTP over Ethernet packets for providing PTP status and capturing timestamp snapshots, that is, IEEE 802.1AS mode of operation. 0 (Val_0x0): AV 802.1AS mode is disabled 1 (Val_0x1): AV 802.1AS mode is enabled |